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TTTC's Electronic Broadcasting
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The 14th IEEE Workshop on Silicon
Errors in Logic - System Effects |
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CALL FOR PAPERS
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The growing complexity and shrinking geometries of modern manufacturing technologies are making high-density, low-voltage devices increasingly susceptible to the influences of electrical noise, process variation, transistor aging, and the effects of natural radiation. The system-level impact of these errors can be far-reaching especially in safety-critical applications like aerospace and automotive. Growing concern about transient errors, unstable storage cells, and the effects of aging are influencing system and application design. While the computational capabilities of emerging logic and memory device technologies are attractive for several safety-critical applications and new computing philosophies like deep learning become popular, they introduce several reliability challenges that need to be addressed. Additionally, reliability is a key issue for large-scale systems, such as those in data centers and cloud computing infrastructure. This year, we also welcome papers on the system security issues as they relate to and impact system reliability. The SELSE workshop provides a unique forum for discussion of current research and practice in system-level error management. Participants from industry and academia explore both current technologies and future research directions. SELSE is soliciting papers that address the system-level effects of errors from a variety of perspectives: architectural, logical, circuit-level, and semiconductor processes. Case studies in real-world contexts are also solicited. Key areas of interest are (but not limited to):
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Submissions and final papers should be in PDF following IEEE two-column transactions format that does not exceed six printed pages of text; the bibliography does not count against this page limit. Papers are not published through IEEE/ACM nor archived in the digital libraries - however, they are distributed to attendees of the workshop. Authors have the option of making their presentation slides available on the SELSE website, but this is not mandatory. Additional information and guidelines for submission are available at http://www.selse.org. |
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| Additional Information | |
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You can contact the organizing committee at: http://www.selse.org/index.php/contact-us/
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| Committee | |
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General Co-Chairs
Program Co-Chairs
Finance Co-Chairs
Publicity Co-Chairs
Documents Chair
Industry Liaison
Webmaster
Local Arrangements Chair
Advisors to the Committee
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For more information, visit
us on the web at: http://www.selse.org
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SELSE 2018 is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC). |
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IEEE Computer Society-Test
Technology Technical Council
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